Formal Verification Engineer | Customizable CPUs | RISC-V IP
Greater Bristol Area, United Kingdom
Codasip
Digital Design Verification - RISC-V ISA - Processor Microarchitecture - CPU - Formal Verification - Model checking - Property checking - SVA - OneSpin - JasperGold- International teams - Start-up culture Locations: France (Villeneuve-Loubet), Germany (Munich), the UK (Bristol/Cambridge), the Czech Republic (Brno, Prague), Barcelona (Spain), Greece (Heraklion/Thessaloniki/Athens) Department … role with the main goal to raise the usage of formal techniques applied to Codasip processors, including Low-Power embedded and High-Performance RISC-V application processors, including multiple-issue and/or multi-core architectures as well as the high-end ones. Our Verification and IP Design … Enable formal verification users to apply standard and advanced methodologies and techniques Contribute to the development of tools Focus on the verification of RISC-V processors and their components to raise the quality of our deliverables Review and support FV test plans YOU NEED TO POSSESS THE FOLLOWING more »
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